Virtual registers

Maker and role
Robert W. Doran, Author
P. Fenwick, Author
Qun Zheng, Author
Production date
Oct 1991

Object detail

Accession number
PUB-2020-13.20
Description
"This paper concerns computer architectures in which registers are virtual, that is, where registers need not correspond exactly to a real fast storage array, and, in particular, where there are many more registers addressable than fast storage elements implemented. There are many architectures where registers are to a greater or lesser extent virtual. One scheme, where the in-use registers are managed as a set associative cache, is explored in some depth - it is seen that such a scheme is not as unreasonable as it might first appear." -- Abstract on title page.
Media/Materials
Physical description
14 pages : illustrations ; 30 cm
Other title
Auckland Computer Science Report No.57
Record level
Item
Credit line
Robert W. Doran et al. Oct 1991. Virtual registers, PUB-2020-13.20. Walsh Memorial Library, The Museum of Transport and Technology (MOTAT).

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